What is a PMOS transistor ?
PMOS stands for P-channel metal-oxide-semiconductor. The structure of a PMOS transistor consists of three main regions: a P-type source, a P-type drain, and an N-type substrate. The current flows through a P-type channel between the source and drain in the N-type body. The Gate is separated from the body using a thin oxide SiO2.
PMOS vs NMOS : Key differences
| Parameter | PMOS Transistor | NMOS Transistor |
|---|---|---|
| Carrier Type | Holes | Electrons |
| Turn ON Condition | Gate voltage is lower than source (VGS < Vth) | Gate voltage is higher than source (VGS > Vth) |
| Substrate Connection | Connected to positive supply (VDD) | Connected to ground (VSS or GND) |
| Mobility of Carriers | Lower (hole mobility) | Higher (electron mobility) |
| Switching Speed | Slower | Faster |
| Power Consumption | Generally higher when ON | Generally lower when ON |
| Size for Same Drive | Larger (to compensate for low mobility) | Smaller |
| Logic Level (ON) | Logic ‘0’ at gate | Logic ‘1’ at gate |
| Common Use | Pull-up networks in CMOS logic | Pull-down networks in CMOS logic |
| Fabrication Cost | Slightly higher due to size | Lower |
| Symbol Arrow Direction | Inward (toward gate) | Outward (away from gate) |
Operation of PMOS transistor
PMOS transistors operate by applying a voltage to the gate terminal, which controls the flow of current between the source and drain terminals. When a positive voltage is applied to the gate terminal relative to the source, it creates an electric field that attracts holes (positive charge carriers) from the source region towards the gate. This electric field forms a conducting p-type channel (“inversion layer”) between the source and drain, allowing current to flow.
In PMOS transistors, the majority carriers are holes, and the flow of current occurs when the gate voltage is lower than the source voltage (in a common configuration known as enhancement mode). When the gate voltage is higher than the source voltage, the transistor is turned off.
Construction of PMOS Transistor
The cross-section of a PMOS transistor typically consists of substrate, source, drain, gate, and channel regions. Each component is described below:
Substrate
The substrate is typically p-type semiconductor material (e.g., silicon). The connection to this P-substrate is done using p+ doping called PSUB. An N-well is formed where the actual PMOS device resides. It provides the foundation for the PMOS structure. The substrate is connected to the lowest voltage potential in the circuit.
Source and Drain Regions
On the surface of the substrate, there are two heavily doped p-type regions known as the source and drain. These regions are created by introducing impurities (e.g., boron) into the well through a process called diffusion.
Channel Region
A thin layer of p-type carriers is located near the surface between the source and drain region in the n-type substrate when the gate voltage applied is less than the source voltage. Since the carrier type changes from n-type to p-type near the surface of the substrate, this process is called “inversion”.
Gate (Control terminal)
Above the channel region is a thin insulating layer (usually silicon dioxide) followed by a metal gate electrode. The gate controls the conductivity of the channel by applying a voltage.
PMOS Transistor I-V Characteristics
The I-V characteristics of PMOS transistors in the triode region where the PMOS behaves as a voltage-controlled resistor (similar derivation as done in NMOS):
$$I_{SD}=\mu{}_pC_{ox}\cfrac{W}{L}\left(V_{SG}-V_{TH}-\cfrac{V_{SD}}{2}\right)V_{SD}$$
The I-V characteristics of PMOS transistors in the active region where the PMOS behaves as a current-controlled current source (CCCS):
$$I_{SD}=\cfrac{\mu{}_pC_{ox}}{2}\cfrac{W}{L}\left(V_{SG}-V_{TH}\right)^2(1+\lambda{}V_{SD})$$
The graph shown below represents the equation above :
PMOS in CMOS technology
PMOS transistors are commonly used in complementary metal-oxide-semiconductor (CMOS) technology, where they are paired with NMOS (N-channel MOS) transistors to create digital logic circuits. CMOS technology allows for low power consumption and high noise immunity, making it widely used in integrated circuits and microprocessors.
PMOS as a switch
A PMOS transistor functions effectively as a switch in digital and analog circuits, particularly in logic gate design and high-side switching applications. It turns ON when the gate voltage is lower than the source (typically when the gate is at logic ‘0’), allowing current to flow from source to drain. Conversely, it turns OFF when the gate voltage is HIGH (logic ‘1’), creating a open (high-impedance) that blocks current flow. This complementary behavior to NMOS makes PMOS ideal for use in CMOS (Complementary MOS) logic circuits, where it typically forms the pull-up network.
Summary
- PMOS is built with a p-type source and drain and an n-type substrate.
- PMOS, carriers are holes.
- When a high voltage is applied to the gate, PMOS will not conduct
- When a low voltage is applied in the gate, PMOS will conduct.